T9110 Rockwell ICS Triplex Single DO terminal board

T9110 Rockwell ICS Triplex Single DO terminal board

T9110 Rockwell ICS Triplex Single DO terminal board

Rockwell ICS Triplex T9110 High Density Guarded Processor Module Under certain operating and environmental conditions noise can be present of one of the digital output module voltage rails. These voltage rails are sampled to ensure that they are within a specific tolerance; but the noise occasionally caused the monitoring circuit to report an over-voltage, resulting in the DO module shutting down. An internal filter has been improved that reduces the effect of the noise and prevents the module from shutting down.

Rockwell ICS Triplex T9110

These rules apply to this release:

 T9110 (and T9120) processors and Workbench MUST be from the same Product Release (i.e. R1.33).

 Workbench licenses: the versions tested are those in the list (given earlier in the document).

 AADvance Workbench licenses R1.2 and later can be used; earlier license versions are not compatible.
AADvance 1.33 is an incremental release of AADvance Release 1.3. This
Release Note includes the following information about AADvance
Release 1.33:
 Hardware and Software Builds for this Release
 Enhancements to the System
 Corrected Problems and Anomalies in this Release
 Restrictions that still Apply
 Tech Notes, Product Notices and Product Safety Advisories
 Product Compatibility Rules
 Technology Support and Additional Resources

The following enhancements are included in this release.
 Increase Variable Bindings Memory
The Variable Bindings (KVB) memory has been increased in size
from 64 K to 128 K. This will allow you to increase the number of
variable bindings that you can set up between controllers in an
application.
 New Workbench license for 5 Users, Unlimited Controllers
New license option T9084U is available: this is an AADvance
Workbench license for 5 Users and no limit to the number of
controllers. It is only available as a USB license option: it will work
with Windows XP Service Pack 3; Windows Vista; Windows 7 and
Server 2003 in both 32-bit and 64-bit versions.

The following problems and anomalies have been corrected in this release.
 Digital Output Module Shutting Down
Under certain operating and environmental conditions noise can be
present of one of the digital output module voltage rails. These
voltage rails are sampled to ensure that they are within a specific
tolerance; but the noise occasionally caused the monitoring circuit to
report an over-voltage, resulting in the DO module shutting down.
An internal filter has been improved that reduces the effect of the
noise and prevents the module from shutting down.

 I/O initialization stalled – TN30051-01 (answer id. 544046)
If, during a controller start-up an I/O module failure occurs it can
stop the I/O initialization. As a result, the controller start-up process
fails to complete, leaving the application program suspended.
Changes to the controller start-up have been made that prevents this
from occurring.
 System power up with a 48 module configuration
The maximum number of I/O modules supported by an AADvance
controller is 48. Certain configurations, particularly when the
majority is Digital Output Modules, can result in a system not
starting-up correctly after a power cycle. Changes to the controller
start-up have been made to prevent this from occurring.
 Processor loss of synchronization
In dual processor configurations it was possible under certain
conditions for the two processors to lose synchronization, but
continue to run asynchronously. Although the I/O still went to its
fail-safe mode, it was possible for any binding data to be incorrect.
Changes to the controller have been made to prevent this from
occurring.
 Spurious Soft Error Detection (SED) faults – TN30056-01
(answer id: 564815)
Each AADvance module uses one or more FPGA’s to provide the
communication interface between the processor and the I/O
modules. The manufacturer of the FPGA used in AADvance
released a Product Notification identifying that this device could
spuriously generate SED errors. The FPGA manufacturers
recommended changes have been made to the controller to prevent
this from occurring.
 Processors lost synchronization after an on-line update
It is possible that on-line updates to a large system with more than 37
I/O modules installed can cause the processors to lose
synchronization. Changes to the controller have been made to
prevent this from occurring.
 Loss of SNCP Kernel Variable Bindings (KVB) communication
Under certain conditions it was possible for both links of dual SNCP
bindings configuration to fail. Changes to the controller have been
made to prevent this from happening

Other relevant models: